The present invention relates generally to random access memory systems, and more particularly relates to an architecture for improving a write margin within a magnetic random access memory (MRAM) device.
Thin film MRAM has been investigated since the early 1950s. However, as described in the text xe2x80x9cComputer Storage Systems and Technology,xe2x80x9d by Richard E. Matick, John Wiley and Sons (1977), which is incorporated herein by reference, these memories were deemed to be impractical due to narrow write and read margins which eroded as device dimensions were scaled. Recently, a renewed interest in MRAM has been sparked by its application to the nonvolatile memory market. New memory devices, such as a magnetic tunnel junction (MTJ) device, which exhibits magneto resistance, overcame an earlier obstacle of inductive sensing. As summarized in Scheuerlein et al., xe2x80x9cA 10ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in Each Cell,xe2x80x9d ISSCC 2000, pp. 128-129, desirable characteristics of MTJ-based memories include high integration density, high speed, low read power, and soft error rate (SER) immunity.
In conventional magnetoresistive memory architectures, writing individual memory cells without also writing adjacent or other non-intended cells remains a problem. Typically, writing an MTJ memory cell involves passing electrical currents simultaneously through a bit line (generally defined along a y axis) and word line (generally defined along an x axis) at the intersection of which the intended MTJ cell resides. Thus, selected cells in a thin film MRAM are written by the coincidence of x-oriented and y-oriented magnetic fields. The selected MTJ cell will experience a magnetic field which is the vector sum of the magnetic fields created by the word and bit line currents. All other MTJ cells that share the same bit line or word line as the selected MTJ cell will be half-selected and will thus be subjected to either bit line or word line magnetic fields, respectively. Since the magnitude of the vector sum of the word line and bit line fields is about forty-one percent (41%) larger than the individual word line or bit line fields, the write selectivity of a selected MTJ cell over half-selected MTJ cells is poor, especially when the non-uniform switching characteristics of the MTJ cells are considered.
Variations in the geometry (e.g., shape or size) of an MTJ cell can give rise to variations in magnetic thresholds of the MTJ cells which are so large that it is virtually impossible to write a selected cell without also arbitrarily switching some of the half-selected cells, thus placing the reliability and validity of the stored data in question. There may also be other factors, for example, related to manufacturing uncertainties and intrinsic magnetic material variability (e.g., temperature and processing variations) such that cell to cell magnetic response variations can be significantly large. This magnetic response variability from cell to cell adversely impacts the write select margin of the MRAM device. Additionally, the spontaneous switching of an MTJ cell when it is subjected to repeated magnetic field excursions much smaller than its nominal switching field, an effect known as xe2x80x9ccreep,xe2x80x9d narrows the acceptable write select margin even further thereby making the need for greater selectivity of individual MTJ cells even more imperative.
A write disturb is generally defined as an unintended alteration of the state of an unselected memory cell while a selected cell, which is targeted for a write operation, is written to a new state. The avoidance of write disturbs is a critical issue for thin film MRAM devices. In conventional thin film MRAM, selected memory cells are written by the coincidence of x-oriented and y-oriented magnetic fields, as stated above. Ideally, half-selected memory cells receive only one of the two fields, and the force of only one field on a magnetic memory cell is typically not enough to change the polarity, and therefore the state, of the cell. In practice, however, stray magnetic fields may combine to make a half-selected memory cell susceptible to write disturbs. This is an undesirable characteristic which is inherent in a conventional coincident x-y write scheme.
A major hurdle to the realization of practical sub-micron MRAM architectures has been the problem of write selectivity. The avoidance of write disturbs in thin film MRAM has, thus far, been unsuccessfully addressed in conventional magnetic memory architectures. There is a need, therefore, in the field of magnetic memory devices and systems for improved write selection techniques which can be readily adapted to a conventional MRAM architecture described above as well as other alternative magnetic memory architectures.
The present invention provides techniques for effectively writing memory cells in an MRAM device. Since the data being written to the adjacent memory cell is known, this data will produce a predictable magnetic field emanating from the corresponding bit line. By adjusting the write current in a first bit line in response to stray magnetic fields emanating from a second bit line which is adjacent to the first bit line, the write current in the first bit line, which furthermore connects to a selected memory cell, can be adjusted to compensate for the stray magnetic field interaction of the second bit line and thus more effectively write the selected memory cell.
In accordance with one aspect of the invention, a write circuit for writing a plurality of selected magnetic memory cells in a magnetic random access memory (MRAM) device comprises a controller for detecting a characteristic representative of an interaction between a magnetic field emanating from a bit line associated with a selected memory cell and at least one stray magnetic field emanating from one or more bit lines associated with one or more memory cells adjacent to the selected memory cell. The controller generates a control signal indicative of the detected characteristic. The write circuit further includes a current source operatively coupled to the bit line associated with the selected memory cell. The current source includes an input for receiving the control signal and generates a write current having a magnitude which varies in response to the control signal. In this manner, the write circuit effectively compensates for magnetic field interactions between adjacent memory cells in the memory array.
In accordance with another aspect of the invention, a method of adjusting the write current of a selected memory cell is provided. The method includes the step of detecting a characteristic which represents an interaction between a magnetic field emanating from a bit line associated with the selected memory cell and at least one stray magnetic field emanating from one or more bit lines associated with one or more memory cells adjacent to the selected memory cell. The method further includes the step of generating a control signal indicative of the detected characteristic and controlling at least a portion of a write current flowing through the bit line corresponding to the selected memory cell in response to the control signal.
These and other objects, features and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings, wherein like elements are designated by identical reference numerals throughout the several views.